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 VND600-E
DOUBLE CHANNEL HIGH SIDE DRIVER
Table 1. General Features
Type VND600-E RDS(on) 35 m
Figure 1. Package
Ilim
25 A
VCC
36 V
s s s
DC SHORT CIRCUIT CURRENT: 25 A
CMOS COMPATIBLE INPUTS PROPORTIONAL LOAD CURRENT SENSE s UNDERVOLTAGE AND OVERVOLTAGEn SHUT-DOWN s OVERVOLTAGE CLAMP s THERMAL SHUT DOWN s CURRENT LIMITATION s VERY LOW STAND-BY POWER DISSIPATION s PROTECTION AGAINST: n LOSS OF GROUND AND LOSS OF VCC s REVERSE BATTERY PROTECTION (*) s IN COMPLIANCE WITH THE 2002/95/EC EUROPEAN DIRECTIVE DESCRIPTION The VND600-E is a monolithic device made using STMicroelectronics VIPower M0-3 technology. It is intended for driving resistive or inductive loads with one side connected to ground. Active V CC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table).
SO-16L
This device has two channels in high side configuration; each channel has an analog sense output on which the sensing current is proportional (according to a known ratio) to the corresponding load current. Built-in thermal shut-down and outputs current limitation protect the chip from over temperature and short circuit. Device turns off in case of ground pin disconnection.
Table 2. Order Codes
Package Tube
VND600-E
Tape and Reel
VND600TR-E
SO-16L
Note: (*) See application schematic at page 9
Rev. 1 October 2004 1/18
VND600-E
Figure 2. Block Diagram
VCC
OVERVOLTAGE VCC CLAMP UNDERVOLTAGE PwCLAMP 1
DRIVER 1
INPUT 1 LOGIC INPUT 2 GND
DRIVER 2
ILIM1 Vdslim1 IOUT1 K
Ot1
OUTPUT 1
CURRENT SENSE 1 OUTPUT 2
Ot2
PwCLAMP 2
Ot1
ILIM2 Vdslim2 IOUT2
OVERTEMP. 1 OVERTEMP. 2
Ot2
K
CURRENT SENSE 2
Table 3. Absolute Maximum Ratings
Symbol VCC Parameter Value Unit
DC supply voltage Reverse supply voltage DC reverse ground pin current Output current Reverse output current Input current Electrostatic Discharge (Human Body Model: R=1.5K; C=100pF)
41 -0.3 -200 Internally limited -21 +/- 10
V V mA A A mA
-VCC - IGND IOUT IR IIN
VESD
- INPUT - CURRENT SENSE - OUTPUT - VCC Maximum Switching Energy
4000 2000 5000 5000
V V V V
EMAX Ptot Tj Tc TSTG
(L=0.12mH; RL=0; Vbat=13.5V; Tjstart=150C; IL=40A) Power dissipation at Tc=25C Junction operating temperature Case operating temperature Storage temperature
136 8.3 Internally limited -40 to 150 -55 to 150
mJ W C C C
2/18
VND600-E
Figure 3. Configuration Diagram (Top View) & Suggested Connections for Unused and N.C. Pins
VCC N.C. GND INPUT 2 INPUT 1 C. SENSE 1 C. SENSE 2 VCC
1
16
VCC OUTPUT 2 OUTPUT 2 OUTPUT 2 OUTPUT 1 OUTPUT 1 OUTPUT 1
8
9
VCC
Connection / Pin Floating To Ground
Current Sense Through 1Kresistor
N.C. X X
Output X
Input X Through 10K resistor
Figure 4. Current and Voltage Conventions
IS VCC IIN1 INPUT1 VIN1 CURRENT SENSE 1 IIN2 VIN2 INPUT2 IOUT2 OUTPUT2 IOUT1 OUTPUT1 ISENSE1 VSENSE1 VOUT1 VF1 (*)
VCC
VOUT2 ISENSE2 VSENSE2
CURRENT SENSE 2 GROUND IGND
(*) VFn = VCCn - VOUTn during reverse battery condition
Table 4. Thermal Data
Symbol Rthj-lead Rthj-amb Parameter Thermal resistance junction-lead Thermal resistance junction-ambient (MAX) (MAX) Value 15 65 (*) 48 (**) Unit C/W C/W
Note: (*) When mounted on a standard single-sided FR-4 board with 0.5cm 2 of Cu (at least 35m thick). Horizontal mounting and no artificial air flow Note: (**) When mounted on a standard single-sided FR-4 board with 6cm2 of Cu (at least 35m thick). Horizontal mounting and no artificial air flow.
3/18
VND600-E
ELECTRICAL CHARACTERISTICS (8VSymbol VCC (**) Parameter Test Conditions Min. Typ. Max. Unit
Operating supply voltage Undervoltage shutdown Overvoltage shutdown IOUT=5A; Tj=25C On state resistance Clamp voltage IOUT=5A; Tj=150C IOUT=3A; VCC=6V ICC=20 mA (see note 1) Off State; VCC=13V; VIN=VOUT=0V Off State; VCC=13V; VIN=VOUT=0V;
5.5 3 36
13 4
36 5.5
V V V
VUSD (**) VOV (**) RON Vclamp
35 70 120 41 48 12 12 55 40 25 6 0 -75 50 0 5 3
m m m V A A mA A A A A
IS (**)
Supply current
Tj=25C
On state; VIN=5V; VCC=13V; IOUT=0A; RSENSE=3.9k
IL(off1) IL(off2) IL(off3) IL(off4)
Off state output current Off State Output Current Off State Output Current Off State Output Current
VIN=VOUT=0V VIN=0V; VOUT =3.5V VIN=VOUT=0V; VCC=13V; Tj =125C VIN=VOUT=0V; VCC=13V; Tj =25C
Note: (**) Per device. Note: 1. Vclamp and VOV are correlated. Typical difference is 5V.
Table 6. Protection (Per each channel) (See note 2)
Symbol Ilim Parameter Test Conditions Min. Typ. Max. Unit
DC short circuit current Thermal shut-down temperature Thermal reset temperature Thermal hysteresis Turn-off output voltage clamp Output voltage drop limitation
VCC=13V 5.5V25
40
70 70
A A C C
TTSD TR THYST Vdemag VON
150 135 7 IOUT =2A; VIN=0V; L=6mH IOUT =0.5A Tj= -40C...+150C VCC-41
175
200
15 VCC-48 50 VCC-55
C V mV
Note: 2. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles
Table 7. VCC - Output Diode
Symbol VF Parameter Forward on Voltage Test Conditions -IOUT=2.3A; Tj=150C Min Typ Max 0.6 Unit V
4/18
VND600-E
ELECTRICAL CHARACTERISTICS (continued) Table 8. Current Sense CURRENT SENSE (9VVCC16V) (See fig. 6)
Symbol K1 dK1/K1 Parameter IOUT /ISENSE Current Sense Ratio Drift Test Conditions IOUT1 or IOUT2=0.5A; VSENSE=0.5V; other channels open; Tj= -40C...150C IOUT1 or IOUT2=0.5A; VSENSE=0.5V; other channels open; Tj= -40C...150C IOUT1 or IOUT2=5A; VSENSE=4V; other channels open; Tj=-40C Tj=25C...150C dK2/K2 Current Sense Ratio Drift IOUT1 or IOUT2=5A; VSENSE=4V; other channels open; Tj=-40C...150C IOUT1 or IOUT2=15A; VSENSE=4V; other channels open; Tj=-40C Tj=25C...150C dK3/K3 VSENSE1,2 Current Sense Ratio Drift Max analog sense IOUT1 or IOUT2=15A; VSENSE=4V; other channels open; Tj=-40C...150C VCC=5.5V; IOUT1,2=2.5A; RSENSE=10k VCC>8V, IOUT1,2=5A; RSENSE=10k VCC=13V; RSENSE=3.9k Min 3300 -10 Typ 4400 Max 6000 +10 % Unit
K2
IOUT /ISENSE
4200 4400 -6
4900 4900
6000 5750 +6 %
K3
IOUT /ISENSE
4200 4400 -6 2 4
4900 4900
5500 5250 +6 % V V
output voltage Analog sense output VSENSEH voltage in overtemperature condition Analog Sense Output RVSENSEH Impedance in Overtemperature Condition Current sense delay tDSENSE response
5.5
V
VCC=13V; Tj>TTSD; All channels Open to 90% ISENSE (see note 3)
400 500
s
Note: 3. Current sense signal delay after positive input slope.
Table 9. Switching (V CC=13V)
Symbol td(on) td(off) Parameter Turn-on delay time Turn-on delay time Test Conditions RL=2.6 (see figure 6) RL=2.6 (see figure 6) RL=2.6 (see figure 6) Min Typ 30 30 See relative diagram See relative diagram Max Unit s s V/s
(dVOUT/dt)on Turn-on voltage slope
(dVOUT/dt)off Turn-off voltage slope
RL=2.6 (see figure 6)
V/s
Table 10. Logic Input (Channel 1, 2)
Symbol VIL IIL VIH IIH VI(hyst) VICL Parameter Test Conditions Input low level voltage Low level input current VIN=1.25V Input high level voltage High level input current VIN=3.25V Input hysteresis voltage IIN=1mA Input clamp voltage IIN=-1mA Min 1 3.25 10 0.5 6 6.8 -0.7 8 Typ Max 1.25 Unit V A V A V V V
5/18
VND600-E
Figure 5. IOUT/ISENSE versus IOUT
IOUT/ISENSE
6500 6000
max.Tj=-40C
5500
max.Tj=25...150C
5000 4500 4000 3500 3000
min.Tj=25...150C typical value
min.Tj=-40C
0
2
4
6
8
IOUT (A)
10
12
14
16
Table 11. Truth Table (per channel)
CONDITIONS Normal operation INPUT L H L H L H L H L Short circuit to GND H H Short circuit to VCC Negative output voltage clamp L H L OUTPUT L H L L L L L L L L L H H L SENSE 0 Nominal 0 VSENSEH 0 0 0 0 0 (TjTTSD) VSENSEH 0 < Nominal 0
Overtemperature
Undervoltage
Overvoltage
6/18
VND600-E
Figure 6. Switching Characteristics (Resistive load RL=2.6)
VOUT
80% dVOUT/dt(on) tr ISENSE 90% 10%
90% dVOUT/dt(off) tf t
INPUT
tDSENSE
t td(off)
td(on)
t
Table 12. Electrical Transient Requirements On V CC Pin
ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 5 ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 5 CLASS C E I -25 V +25 V -25 V +25 V -4 V +26.5 V II -50 V +50 V -50 V +50 V -5 V +46.5 V TEST LEVELS III -75 V +75 V -100 V +75 V -6 V +66.5 V TEST LEVELS RESULTS II III C C C C C C C C C C E E IV -100 V +100 V -150 V +100 V -7 V +86.5 V Delays and Impedance 2 ms 10 0.2 ms 10 0.1 s 50 0.1 s 50 100 ms, 0.01 400 ms, 2
I C C C C C C
IV C C C C C E
CONTENTS All functions of the device are performed as designed after exposure to disturbance. One or more functions of the device is not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
7/18
VND600-E
Figure 7. Waveforms
NORMAL OPERATION INPUTn LOAD CURRENTn SENSEn
UNDERVOLTAGE VCC INPUTn LOAD CURRENTn SENSEn OVERVOLTAGE
VOV VUSD VUSDhyst
VCC INPUTn LOAD CURRENTn SENSEn
VCC < VOV
VCC > VOV
SHORT TO GROUND INPUTn LOAD CURRENTn LOAD VOLTAGEn SENSEn
SHORT TO VCC INPUTn LOAD VOLTAGEn LOAD CURRENTn SENSEn
OVERTEMPERATURE Tj INPUTn LOAD CURRENTn SENSEn
ISENSE = VSENSEH RSENSE TTSD TR
8/18
VND600-E
Figure 8. Application Schematic
+5V
Rprot INPUT1
VCC
Dld
C
Rprot Rprot
CURRENT SENSE1 INPUT2
OUTPUT1
Rprot
CURRENT SENSE2 GND OUTPUT2
RSENSE1
RSENSE2
VGND
RGND
DGND
GND PROTECTION REVERSE BATTERY
NETWORK
AGAINST
Solution 1: Resistor in the ground line (RGND only). This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. 1) RGND 600mV / IS(on)max. 2) RGND (-VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device's datasheet. Power Dissipation in RGND (when VCC<0: during reverse battery situations) is: PD= (-VCC)2/RGND This resistor can be shared amongst several different HSD. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. Please note that if the microprocessor ground is not common with the device ground then the RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift will vary depending on how many devices are ON in the case of several high side drivers sharing the same RGND. If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then the ST suggests to utilize Solution 2 (see below). Solution 2: A diode (DGND) in the ground line. A resistor (RGND=1k) should be inserted in parallel to DGND if the device will be driving an inductive load. This small signal diode can be safely shared amongst several different HSDs.
Also in this case, the presence of the ground network will produce a shift (j600mV) in the input thresholds and the status output values if the microprocessor ground is not common with the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network. Series resistor in INPUT and STATUS lines are also required to prevent that, during battery voltage transient, the current exceeds the Absolute Maximum Rating. Safest configuration for unused INPUT and STATUS pin is to leave them unconnected.
LOAD DUMP PROTECTION
Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds VCC max DC rating. The same applies if the device will be subject to transients on the VCC line that are greater than the ones shown in the ISO T/R 7637/1 table. .C I/Os PROTECTION: If a ground protection network is used and negative transient are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the C I/Os pins to latch-up. The value of these resistors is a compromise between the leakage current of C and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of C I/Os. -VCCpeak/Ilatchup Rprot (VOHC-VIH-VGND) / IIHmax Calculation example: For VCCpeak= - 100V and Ilatchup 20mA; VOHC 4.5V 5k Rprot 65k. Recommended Rprot value is 10k.
9/18
VND600-E
Figure 9. Off State Output Current
IL(off1) (uA)
5 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 -50 -25 0 25 50 75 100 125 150 175
Figure 10. High Level Input Current
Iih (uA)
5 4.5
Off state Vcc=36V Vin=Vout=0V
Vin=3.25V
4 3.5 3 2.5 2 1.5 1 0.5 0 -50 -25 0 25 50 75 100 125 150 175
Tc (C)
Tc (C)
Figure 11. Input Clamp Voltage
Vicl (V)
8 7.8
Figure 13. Input High Level
Vih (V)
3.6 3.4 3.2
Iin=1mA
7.6 7.4 7.2 7 6.8 6.6
3 2.8 2.6 2.4
6.4 6.2 6 -50 -25 0 25 50 75 100 125 150 175 2.2 2 -50 -25 0 25 50 75 100 125 150 175
Tc (C)
Tc (C)
Figure 12. Input Low Level
Vil (V)
2.6 2.4 2.2
Figure 14. Input Hysteresis Voltage
Vhyst (V)
1.5 1.4 1.3 1.2
2 1.8 1.6 1.4
1.1 1 0.9 0.8 0.7
1.2 1 -50 -25 0 25 50 75 100 125 150 175
0.6 0.5 -50 -25 0 25 50 75 100 125 150 175
Tc (C)
Tc (C)
10/18
VND600-E
Figure 15. Overvoltage Shutdown
Vov (V)
50 48 46 60 44 42 40 38 36 20 34 32 30 -50 -25 0 25 50 75 100 125 150 175 10 0 -50 -25 0 25 50 75 100 125 150 175 50 40 30
Figure 18. ILIM Vs Tcase
Ilim (A)
80 70
Vcc=13V
Tc (C)
Tc (C)
Figure 16. Turn-on Voltage Slope
dVout/dt(on) (V/ms)
750 700 650 600 550 500 450 400 350 300 250 -50 -25 0 25 50 75 100 125 150 175
Figure 19. Turn-off Voltage Slope
dVout/dt(off) (V/ms)
500 450
Vcc=13V Rl=2.6Ohm
400 350 300 250 200 150 100 50 0 -50
Vcc=13V Rl=2.6Ohm
-25
0
25
50
75
100
125
150
175
Tc (C)
Tc (C)
Figure 17. On State Resistance Vs Tcase
Ron (mOhm)
100 90 80 70 60 50 40 30
Figure 20. On State Resistance Vs VCC
Ron (mOhm)
80 70
Iout=5A Vcc=8V & 36V
Iout=5A
60 50 40 30 20
Tc= 150C
Tc= 25C
20 10 0 -75 -50 -25 0 25 50 75 100 125 150 175
Tc= - 40C
10 0 5 10 15 20 25 30 35 40
Tc (C)
Vcc (V)
11/18
VND600-E
Figure 21. SO-16L Maximum turn off current versus load inductance
ILMAX (A) 100
A B C
10
1 0.01 0.1 1 L(mH) 10 100
A = Single Pulse at TJstart=150C B= Repetitive pulse at T Jstart=100C C= Repetitive Pulse at T Jstart=125C Conditions: VCC=13.5V
Values are generated with R L=0 In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C.
VIN, IL Demagnetization Demagnetization Demagnetization
t
12/18
VND600-E
SO-16L Thermal Data Figure 22. SO-16L PC Board
Layout condition of Rth and Zth measurements (PCB FR4 area= 41mm x 48mm, PCB thickness=2mm, Cu thickness=35m, Copper areas: 0.5cm2, 6cm2).
Figure 23. Rthj-amb Vs PCB copper area in open box free air condition
70 65 60 55 50 45 40
RTH j-amb (C/W)
0
1
2
3
4
5
6
7
PCB Cu heatsink area (cm^2)
13/18
VND600-E
Figure 24. SO-16L Thermal Impedance Junction Ambient Single Pulse
ZT H (C/W) 1000
100
Footprint 6 cm2
10
1
0.1
0.01 0.0001 0.001 0.01 0.1 1 T ime (s) 10 100 1000
Figure 25. Thermal fitting model of a double channel HSD in SO-16L
Pulse calculation formula
Z TH = R TH + Z THtp ( 1 - )
where
= tp T
Table 13. Thermal Parameter
Tj_1
Pd1 C1 C2 C1 C2 C3 C4 C5 C6
R1
R2
R3
R4
R5
R6
Tj_2
R1 Pd2
R2
T_amb
R1 R2 R3 R4 R5 R6 C1 C2 C3 C4 C5 C6
Area/island (cm2) (C/W) (C/W) ( C/W) (C/W) (C/W) (C/W) (W.s/C) (W.s/C) (W.s/C) (W.s/C) (W.s/C) (W.s/C)
Footprint 0.05 0.3 2.2 12 15 37 0.001 5.00E-03 0.02 0.3 1 3
6
22
5
14/18
VND600-E
PACKAGE MECHANICAL Table 14. SO-16L Mechanical Data
Symbol A a1 a2 b b1 C c1 D E e e3 F L M S millimeters Min 0.1 0.35 0.23 0.5 45 (typ.) 10.1 10.0 1.27 8.89 7.4 0.5 8 (max.) 7.6 1.27 0.75 10.5 10.65 Typ Max 2.65 0.2 2.45 0.49 0.32
Figure 26. SO-16L Package Dimensions
15/18
VND600-E
Figure 27. SO-16L Tube Shipment (No Suffix)
C B
Base Q.ty Bulk Q.ty Tube length ( 0.5) A B C ( 0.1)
All dimensions are in mm.
50 1000 532 3.5 13.8 0.6
A
Figure 28. Tape And Reel Shipment (Suffix "TR")
REEL DIMENSIONS
Base Q.ty Bulk Q.ty A (max) B (min) C ( 0.2) F G (+ 2 / -0) N (min) T (max)
1000 1000 330 1.5 13 20.2 16.4 60 22.4
TAPE DIMENSIONS
According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 ( 0.1) P D ( 0.1/-0) D1 (min) F ( 0.05) K (max) P1 ( 0.1) 16 4 12 1.5 1.5 7.5 6.5 2
End
All dimensions are in mm.
Start Top cover tape No components 500mm min Empty components pockets saled with cover tape. User direction of feed 500mm min Components No components
16/18
VND600-E
REVISION HISTORY
Date Oct. 2004 Revision 1 - First Issue. Description of Changes
17/18
VND600-E
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners (c) 2004 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com
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